The present invention relates to a technique which is applied effectively to a prevention technique of electrostatic breakdown in semiconductor integrated circuit devices (or semiconductor devices).
Japanese Patent Laid-Open No. 2006-156914 (Patent document 1) discloses a HEMT (High Electron Mobility Transistor) in which a gate electrode and the like are formed over the surface of a portion which is formed into a high resistance region by doping of iron or the like into a III-V group compound semiconductor stacked structure such as AlGaN.
Japanese Patent Laid-Open No. 1993-235045 (Patent document 2) discloses the following technique. That is, the dielectric strength voltage of a semi-insulating region which is formed by doping boron or hydrogen into an n-type GaAs layer through ion implantation tends to be lower than the dielectric strength voltage of the n-type GaAs layer itself. Hence, a silicon-oxide based insulating film lies between this semi-insulating region and a gate electrode of a field effect transistor thereover.
Japanese Patent Laid-open No. 1999-150426 (Patent document 3) discloses a technique of coupling one electrode of an MIM (Metal-Insulator-Metal) capacitor, which is coupled to an external terminal of a microwave IC (Integrated Circuit) and has a low electrostatic breakdown resistance, to a source or drain of a transistor via a route having a low resistance for DC current and a high impedance for high-frequency.